symposium/lacsci_2005/w7abstracts/algorithm_acceleration_wo.html
    
        
    
        
        
          
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  <title>Algorithm Acceleration Workshop</title>
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<h2>
 Algorithm Acceleration with Reconfigurable Hardware</h2>
                         
LACSI Workshop, Oct. 11, 2005<br>
                         
Organizers: Maya B. Gokhale <br>
                                     
       Rod R.
Oldehoeft <br>
 <br>
Over the past 15 years, direct execution of algorithms in
reconfigurable hardware has demonstrated speedup of one to two orders
of magnitude over equivalent software. Reconfigurable Computers (RC)
using Field Programmable Gate Arrays (FPGAs ) as processors have
emerged as co-processors to augment microprocessors in work stations,
clusters, and supercomputers. While RC offers remarkable opportunities
for performance, research challenges abound. The workshop will be
organized into two half-day sessions. The morning session will present
introductory topics and applications. The afternoon session will
include research topics in FPGA-based architectures, systems, tools,
and future directions.<br>
<br>
<br>
<br>
9-10           
Maya Gokhale, Introduction to Reconfigurable Computing <br>
       
       
    <a href="gokhale_abs.txt">Abstract</a><br>
       
       
    <a href="gokhale_talk.pdf">Presentation</a><br>
<br>
10-10:30       
Reid Porter, et. al. A Reconfigurable Computing<br>
               
      Framework for
Multi-scale Cellular Image Processing<br>
       
       
      <a href="porter_abs.pdf">Abstract</a><br>
                      <a href="porter_talk.pdf">Presentation (no movies)</a><br>
<br>
10:30-11       
Break<br>
<br>
11-11:30       
Daniel G. Chavarra, Miranda and David Chassin <br>
               
      A Hardware-Accelerated Steady-State Power Flow Solver<br>
                       <a href="chavarra_abs.pdf">Abstract</a><br>
                       <a href="chavarra_talk.pdf">Presentation</a><br>
<br>
11:30-12       
Chuan He, Guan Qinand and  Wei Zhao, <br>
               
      High-order Finite Difference Seismic Modeling on <br>
               
      Reconfigurable Computing Platform<br>
                      <a href="he_abs.pdf">Abstract</a><br>
                      <a href="he_talk.pdf">Presentation</a><br>
<br>
12-12:30       
Zachary K. Baker and Viktor K. Prasanna, <br>
                     
Hardware Accelerated Apriori Algorithm for Data Mining<br>
                      <a href="baker_abs.pdf">Abstract</a><br>
                      <a href="baker_talk.pdf">Presentation</a><br>
<br>
12:30-2        
Lunch (on your own)<br>
<br>
2-2:30         
Chen Chang, John Wawrzynek, Robert W. Brodersen, <br>
               
    The Design And Application of BEE2 <br>
               
    A High-End Reconfigurable Computing System<br>
                    <a href="chang_abs.pdf">Abstract</a><br>
                    <a href="chang_talk.pdf">Presentation</a><br>
<br>
<br>
2:30-3         
Keith D. Underwood and K. Scott Hemmert, <br>
               
    Implications of FPGAs for Floating-Point HPC Systems<br>
                    <a href="underwood_abs.pdf">Abstract</a><br>
                    <a href="underwood_talk.pdf">Presentation</a><br>
<br>
3-3:30         
Justin L. Tripp et. al., Trident: An FPGA Compiler <br>
               
    Framework for Scientific Computing<br>
                    <a href="tripp_abs.pdf">Abstract</a><br>
                    <a href="tripp_talk.pdf">Presentation</a><br>
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