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Compiling for Increasing On-chip Parallelism

by admin — last modified 2007-12-10 18:34

Presented during the Workshop on Tools and Compilers for Hardware Acceleration (TCHA) in conjunction with the Fifteenth International Conference on Parallel Architectures and Compilation Techniques (PACT 2006).

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Copyright © 2003-2010 Los Alamos Computer Science Institute (LACSI),
Rice University, MS 41, 6100 Main Street, Houston, TX 77005.

This material is based on work supported by the Department of Energy under Contract
Nos. 03891-001-99-4G, 74837-001-03 49, 86192-001-04 49, and/or 12783-001-05 49
from the Los Alamos National Laboratory.

Any opinions, findings and conclusions or recommendations expressed in this material are those of the author(s)
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